Logic device/transceiver/encoder

The MC14174B hex D-type flip-flop is built in a monolithic structure using MOS P-channel and N-channel enhancement mode devices. Data on the D input that meets the setup time requirements is transferred to the Q output on the rising edge of the clock pulse. All six flip-flops share a common clock and reset input. Reset is active low and is independent of the clock.

Dual Negative Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125

Dual Positive Edge Triggered D-Type Flip-Flops with Clear and Preset 14-SSOP -40 to 125

6-Channel, 2V to 3.6V Inverter 14-SOIC with Schmitt Trigger Input -40 to 125